RE: [sv-ac] P1800 AC - minutes of meeting on 10/14/2004 - next me eting 10/28/2004

Hi,

Unforunately, I missed yesterdays meeting due to "time changing" confusion. I phoned in an hour late.

I cannot agree with the claim on 196.
- ref - has a meaning, which is the same meaning as in SV tasks.
- input/output/inout - can be defined at a later stage (if needed) for properties and sequences.

What else is problematic with the proposal?

I would argue, on the contrary the new proposal aligns with the rest of the language, the problem with the current proposal is that
it effects the current language.

In addition in order to align with John's and Doron's (not Boron - please fix minutes) new proposal, I would propose sequences as
being a data type which is a 'ref' of one bit size. Therefore sequences can be passed as parameters in a fashion that would
prevent irregular properties.

For example:

   property my_always(ref p);
       p and (1'b1 |=> my_always(p));
   endproperty
 
   my_always(S(v));

Thanks
Hillel

-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org]On Behalf Of Eduard Cerny
Sent: Thursday, October 14, 2004 9:07 PM
To: sv-ac@eda.org
Subject: [sv-ac] P1800 AC - minutes of meeting on 10/14/2004 - next meeting 10/28/2004

Please find attached the minutes of the meeting on 10/14/2004. Let me know
if
some corrections are needed.

Best regards,

ed

--
Eduard Cerny, PhD               Principal Engineer, R&D, VG
Synopsys, Inc.                  Tel. 508 263 8198
377 Simarano Drive, Suite 300   FAX  508 263 8069
Marlborough, MA 01752           mailto:edcerny@synopsys.com