Re: [sv-ac] Errata - unable to specify clocking event for a propertyinstance

Subject: Re: [sv-ac] Errata - unable to specify clocking event for a propertyinstance
From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Nov 07 2003 - 14:30:54 PST

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Hi Surrendra;

We will need to add to the LRM text to support this new abilities.
Is this really an eratta? It would seem like an enhancement.

I can place a clock specification on a property and assert that property.

       Adam Krolnik
       Verification Mgr.
       LSI Logic Corp.
       Plano TX. 75074
       Co-author "Assertion Based Design"

Next message: Jay Lawrence: "[sv-ac] Constraint implication, sequence implication, and transitions"
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In reply to: Surrendra Dudani: "[sv-ac] Errata - unable to specify clocking event for a property instance"
Reply: Adam Krolnik: "Re: [sv-ac] Errata - unable to specify clocking event for a propertyinstance"
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