RE: [sv-ac] Vote Results Sept 12

Hi all,

I uploaded an update version addressing the comments I received: http://www.eda-stds.org/mantis/file_download.php?file_id=5437&type=bug.
Note that the correct vote results are 4y/1n.

Thanks,
Dmitry

-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Thomas J Thatcher
Sent: Tuesday, September 13, 2011 20:01
To: sv-ac@eda.org
Subject: [sv-ac] Vote Results Sept 12

Mantis 2093 Failed, 2y, 1n

Manisha:
1. I don't understand the reason for creating
list_of_checker_port_identifiers in bnf. Only thing which is needed is to add optional checker_port_direction.

2. I do not like the way data type is getting inferred in section
17.2. It is not consistent. If we are making it mandatory to specify type if user has keyword 'output' then it should be mandatory to put type if 'input' is used. This will make it consistent with 'local...' type of arguments for properties. If we do not want to make it mandatory then it should infer data type from the previous declaration instead of making it untyped.

3. In the sentence "Similarly to sequences and properties a
checker declaration...", I think it should be 'Similar to sequence and property declarations, a checker .....".

4. There is no clarification about how output port initialization
is done. Does it happen in reactive region ?

5. Since actual connected to output port of a checker is going to
get updated in reactive region, it may be good to show an example how to use this value. Current examples only show the checkers but do not show how to read that value in testbench to get updated value.

Friendly Amendments:
--------------------
Jacob:
In example 4, change 0'b1 to 1'b1

Tom:

The first motivational example shows a checker output, but it doesn't show how that output is being used to do something useful.

In the second motivational example, the checker model_fsm does not use the variable state anywhere inside. I suggest omitting that port from the checker port list. In both the before and after examples, there are no input ports for signals or events that might cause a state change.

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