Subject: [sv-ac] comments on Surrendra's corrections
From: John Havlicek (john.havlicek@motorola.com)
Date: Sun Nov 02 2003 - 09:34:42 PST
All:
Below are my comments on Surrendra's suggested changes in
SV_AC_LRM_corrections_10.12.pdf.
Best regards,
John H.
========================================================================
1.1 I agree.
1.2 I agree.
1.3 I agree.
1.4 I agree.
1.5 I agree.
1.6 I agree.
1.7 I agree.
1.8 I agree.
1.9 I agree.
1.10 I agree, but I'm not happy about the way the picture
fig 17-12 seems to confuse the sampling of values.
Sampling at mclk, it looks to me as though $fell burst_mode
should be true at time 3, not time 2. Etc., etc., etc.
I think the same goes for fig 17-11.
What do other people think?
1.11 I agree. With this change, the definition of property r2 is
the same as that of property r3. However, I think that
property r3;
@(posedge mclk)(q != d);
endproperty
always @(posedge mclk) begin
if (a) begin
q <= d1;
r3_p: assert property (r2);
end
end
should be
property r3;
@(posedge mclk)(q != d);
endproperty
always @(posedge mclk) begin
if (a) begin
q <= d1;
r3_p: assert property (r3);
end
end
1.12 I agree.
1.13 I agree.
1.14 I agree.
1.15 I agree, but change "atleat" to "at least". I have already said
that I think these figures are misleading representations of the
signal sampling.
1.16 I agree, same caveat about the sampling in the diagrams.
1.17 I agree. Probably there should not be a semicolon after <statements>.
1.18 I agree.
1.19 I agree.
1.20 I agree.
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