[sv-ac] RE: Call to vote: Due May 16

Hi Scott,

Please, see below.

Thanks,
Dmitry

From: Little Scott-B11206 [mailto:B11206@freescale.com]
Sent: Thursday, May 19, 2011 19:52
To: Korchemny, Dmitry; 'sv-ac@eda-stds.org'
Subject: RE: Call to vote: Due May 16

Hi Dmitry:

I think that the changes to 16.5.1 are an improvement. I presume that ”A sampled value of a variable in a time slot corresponding to time 0” is the same thing as the “initial sampled value”? I think 16.5.1 would benefit from this relationship being made explicitly clear. How about something like: “The initial sampled value of a variable is the value assigned…

[Korchemny, Dmitry] These two notions coincide for variables but in the general case they are not the same thing. The goal of an initial sampled value of an expression is to introduce its “prehistoric” value, i.e., the value ascribed to it before time 0. For example, the sampled value of seq.triggered in the Observed region at time 0 depends on the sequence matching result at this time, whereas its initial value is always 0. The same is true for active free checker variables (which is not clear from my proposal). Therefore these two notions should be carefully distinguished.

I restructured the definition.

Dmitry I started thinking about the definition of “sampled value” in this proposal and how the term sampled value is used in the rest of the LRM. I have become quite concerned that it likely results in phrases that are difficult to interpret. Let me contrast the wording in some sections of the LRM.

(from 14.4 pg. 322 of Draft1)
NOTE—A clocking block does not eliminate potential races when an event control outside a program block is sensitive
to the same clock as the clocking block and a statement after the event control attempts to read a member of the clocking
block. The race is between reading the old sampled value and the new sampled value.

(from 16.5.1 in 3213 proposal)
Concurrent assertions and several other constructs (such as checker actual arguments, see 17.3) have special rules for sampling values of their expressions. The value of an expression sampled in their context is called a sampled value.

(from 16.9.3 in 3213 proposal)
$past returns the sampled value of expression1 from the Postponed region of a particular time step strictly prior to the one in which $past is evaluated.
[Korchemny, Dmitry]
I realize that in 16.5.1 you give a very careful definition of “sampled value”, but there is also a notion of sampling and a sampled value elsewhere in the LRM. How do I know when I should apply the definition in 16.5.1 and when it simply means the common definition of sampling? In the phrase from 16.9.3 what is my clue that I should use the “sampled value” definition of 16.5.1 and not interpret that to mean “standard” sampling of the variable in the Postponed region? I think it is a bit ugly, but do we need to add another qualifier and define something like concurrent sampled value?

[Korchemny, Dmitry] Yes, this is a known issue, and it exists probably from the beginning of SystemVerilog. Also, your list may be continued. Sampling is used in three major contexts:

- Clocking block sampling

- Assertion sampling

- Covergroup sampling
It is also used in several other places in the LRM with a different meaning, e.g.,
9.4.5 Intra-assignment timing controls: “The code in this example samples and sets the values of…”
23.6 Hierarchical names: “If the unique hierarchical path name of an item is known, its value can be sampled or changed from anywhere within the description.”
Figure 31-1—Sample $timeskew
Figure 31-2—Sample $timeskew with remain_active_flag set
Figure 31-3—Sample $fullskew
31.7 Enabling timing checks with conditioned events: “To perform the previous sample setup check…”

This issue should be solved at the LRM level. The logically clean solution would be to discontinue using the term “sampling” in assertions altogether and to use terms “preponed” and “concurrent” instead. Note that this is a more radical solution than one of the previous versions of my proposal where the concurrent context was introduced on top of sampling, and mentioning of sampled values was kept in many examples and explanations where it had a correct meaning. If we adopt this option, we will have to completely get rid of the notion of sampling in assertions. I am afraid that the opposition will be big.

We can think about a less radical solution – to mention in the introduction that we are talking about assertion sampling, and this sampling should be distinguished from other types of sampling mentioned in the LRM. I modified the proposal according to the second option.

Thanks,
Scott

From: Korchemny, Dmitry [mailto:dmitry.korchemny@intel.com]
Sent: Thursday, May 19, 2011 9:40 AM
To: Little Scott-B11206; 'sv-ac@eda-stds.org'
Subject: RE: Call to vote: Due May 16

Hi Scott,

Please, see my comments below.

Thanks,
Dmitry

From: Little Scott-B11206 [mailto:B11206@freescale.com]
Sent: Monday, May 16, 2011 17:07
To: Korchemny, Dmitry; 'sv-ac@eda-stds.org'
Subject: RE: Call to vote: Due May 16

Mantis 3213 ____ Yes __X__ No

http://www.eda-stds.org/mantis/view.php?id=3213
http://www.eda-stds.org/mantis/file_download.php?file_id=5003&type=bug

-In the introductory explanation at the top of page 2 there is still a reference to $concurrent.
[Korchemny, Dmitry] Fixed.

-In 16.5.1 the final sentence in the second item in the section is very awkward. Could it be reworded as: “For example, the sampled value at time 0 of variable y of type logic is X.”?
[Korchemny, Dmitry] This was a typo. Fixed.

-In 16.5.1, the second bullet states, “The initial value of any other variable or net is the default value of the corresponding type…” Do you mean the initial sampled value?
[Korchemny, Dmitry] This bullet states: “A sampled value of a variable in a time slot corresponding to time 0 is the initial value of this variable.” Then it explains what the initial value of a variable is. This text was moved from 16.9.3 Sampled value functions here.
Then farther down in the enumerated list you state that the initial sampled value of an automatic or local variable is undefined. I believe the second statement is what you want, but I believe the first statement should be clarified. What are the implications of making initial sampled values undefined? Is it a simulator error if an assertion needs a sampled value of an automatic variable in the initial timestep? This feels to me like it is working against the basic principles of the proposal to allow a more free use of “nonstandard” variables throughout the assertions. Why not take the default type values instead of undefined?
[Korchemny, Dmitry] My definition should be correct. The initial sampled values are used only in sampled value functions where all these undefined cases are forbidden, so there is no need to specify their behavior in simulation. However, to simplify the proposal I followed your suggestion and modifies these bullets as follows:

¾ An initial sampled value of a variable is its initial value, explicit or implicit, (see 6.8).

¾ An initial sampled value of sequence methods triggered and matched is 1’b0.

¾ An initial sampled value of an expression is defined recursively using values of its arguments.

[Note: Ed seems to be concerned about this point as well. I am not sure it is adequately addressed at this point although I don’t have any particularly good ideas about how to improve the situation.] I understand why it is done, but I think the descriptions of the sampled value functions have become somewhat confusing for the common case (static variables). “$past returns the sampled value of expression1 from the Postponed region of a particular time step strictly prior to the one in which $past is evaluated.” For static variables the sampled value doesn’t change in a timestep, so where the sampled value is grabbed doesn’t matter. I am not sure that is obvious to the casual reader. In fact, I wonder if folks may misinterpret this to mean that variables are sampled in the Postponed region instead of that the sampled value is captured in the Postponed region. I would like to see the definition of the common case more clearly stated, but I am afraid this may clutter up the definitions.

[Korchemny, Dmitry] I share Ed’s and your concerns, and I added an additional explanation at the beginning of 16.9.3 in one of the recent versions of my proposals. I will appreciate if you or other people can suggest a better language for it.

Mantis 3385 __X__ Yes ____ No

http://www.eda-stds.org/mantis/view.php?id=3385
http://www.eda-stds.org/mantis/file_download.php?file_id=4999&type=bug

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