[sv-ac] Issue with Mantis 2722

From: Korchemny, Dmitry <dmitry.korchemny@intel.com>
Date: Wed May 11 2011 - 13:04:41 PDT

Hi all,

I don't like the description in Mantis 2722: "Then, at clock tick 6, data_end evaluates to true because $fell(stop) and irdy==0 both evaluate to true." Though, formally speaking this sentence is correct, it is correct "vacuously". The property evaluates to true or false at its beginning. E.g., the property $rose(data_phase) |-> ##[1,5] ((irdy==0) && ($fell(trdy) || $fell(stop))) evaluates to true at time 2 since $rose(data_phase) is true at time 2, and ((irdy==0) && ($fell(trdy) || $fell(stop))) is true at time 6 (Fig. 16-14). What we intended to say that at clock tick 6, data_end is detected to be true. $rose(data_phase) |-> ##[1,5] ((irdy==0) && ($fell(trdy) || $fell(stop))) is indeed true at time 6, but only due to $rose(data_phase) is false at that time.

I suggest we change "evaluates to true" to "is detected to be true".

What do you think?

Thanks,
Dmitry
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Received on Wed May 11 13:05:21 2011

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