Re: [sv-ac] Forwarding note from Jay Lawrence


Subject: Re: [sv-ac] Forwarding note from Jay Lawrence
From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Apr 25 2003 - 09:28:03 PDT


Hi Arturo;

>I don't agree that the issues you mention will turn people off from using
>assertions. They may turn people off from providing their own messages,

I understand - people's opinions are based on their experiences. My experiences
are from working with designers for over 6 years on assertions on various
design projects.

>As a user, I would prefer more control over the error messages generated
>by default when concurrent assertions fail. There are many things that a
>built-in error generator can do that a user provided $display cannot, such as
>the source file from which the assertion was instantiated, its full pathname,
>the hierarchical name of each of the signals involved in the assertion, the

I'm confused by this statement - the $error() system task is a built in error
message generator, defined to provide all of this information. There are really
two parts of an error message.

1. The information that locates the assertion and the failure in the
    simulation. verilog file name, line #, hierarchical path, simulation time.

2. The users provided information to guide the use as to what the failure is
    and why it is a failure.

E.g

     mutex: assert property (aprop(a, b))
        else $error("this is bad adam, a %h, b %h", a, b);

If this fails, one could have an error message like:

Runtime error - from top.blk1.ele1.mutex, file: design/blk1/blk_elem.v, line 226.
   At time 220 - this is bad adam, a 1 b 0.

This is the message that one needs to have correct information.

I am not invalidating the work, but showing that there is an issue about properly
reporting assertion failures. IMHO, this issue should be addressed before it
goes to the board. If it passes, then I recommend this be a post 3.1 issue
to be resolved. Since we have put functionality into the SV 3.1 spec we should
ensure that performs its desired function and not redirect one to an alternative
vendor tool for correct information.

     Thanks guys.

    Adam Krolnik
    Verification Mgr.
    LSI Logic Corp.
    Plano TX. 75074



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