[sv-ac] Mentor vote on SVA

Subject: [sv-ac] Mentor vote on SVA
From: Stephen Meier (Stephen.Meier@synopsys.com)
Date: Thu Apr 24 2003 - 17:08:11 PDT


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From: "Singh, Tej" <tej_singh@mentorg.com>
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Subject: Mentor vote on SVA
Date: Thu, 24 Apr 2003 16:41:58 -0700
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Mentor votes *yes* to approve the SVA section of the System Verilog 3.1
LRM.
 
We think the document is ready to be forwarded to the board but needs
more
refinement before it can be presented to IEEE.
 
Thanks
Tej
 

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Mentor votes *yes* to approve the SVA section of the System Verilog 3.1 LRM.
 
We think the document is ready to be forwarded to the board but needs more
refinement before it can be presented to IEEE.
 
Thanks
Tej
 

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Steve Meier (stephen.meier@synopsys.com) W: 650-584-4476, Cell: 408-393-8246

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