Subject: Re: [sv-ac] 17.9: System functions: $onehot/$onehot0
From: Adam Krolnik (krolnik@lsil.com)
Date: Tue Apr 22 2003 - 11:20:44 PDT
Hi Connie;
Yes, you are right this is not the intent. This is an error made in the SystemVerilog
3.0 spec.
They should say:
- $onehot (<expression>) returns true if only one bit of the expression
is high.
- $onehot0(<expression>) returns true if at most one bit of the expression
is HIGH.
The difference is to allow the value 0 to pass or not...
Proposal for Section 17.9 page 181.
WAS:
- $onehot0(<expression>) returns true if at most one bit of the expression is low.
PROPOSED:
- $onehot0(<expression>) returns true if at most one bit of the expression is high.
Justification:
The name $onehot0 is a shortened version of the intent, onehot or zero. Thus it should
allow the value zero in addition to values that have only 1 of their bits set.
Alternatively, we have our first erratta to be put on the list.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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