Subject: RE: [sv-ac] Date: Tue, 1 Apr 2003 16:06:18 -0600
From: Bassam Tabbara (bassam@novas.com)
Date: Tue Apr 01 2003 - 14:13:51 PST
Harry, all the SV 3.0 are to be added ..... Just lag in doc updates.
-Bassam.
-- Dr. Bassam Tabbara Technical Manager, R&D Novas Software, Inc.http://www.novas.com (408) 467-7893
> -----Original Message----- > From: owner-sv-ac@server.eda.org > [mailto:owner-sv-ac@server.eda.org] On Behalf Of Harry Foster > Sent: Tuesday, April 01, 2003 2:06 PM > To: Sv-Ac@Eda. Org > Subject: [sv-ac] Date: Tue, 1 Apr 2003 16:06:18 -0600 > > > 5 Boolean Expression Extensions > These operators are part of the built-in system functions and methods > > boolean_expr_op ::= > | seq_name.ended > | seq_name.matched > | value_change_functions > | $past ( expression [ , number_of_ticks] ) > | $countones ( expression ) > > value_change_functions::= > $rose ( expression ) > | $fell ( expression ) > | $stable (expression ) > > > Question: > ======== > Are we not supporting the SystemVerilog 3.0 task: > > $inset() > $insetz() > ? > > These are very powerful functions that would require a lot > of extra coding on the user's part if dropped from > the SystemVerilog 3.1 spec. > > Best regards, > > -Harry > --------------------------------------------------------- > Harry Foster Tel 972-423-3186 > Chief Architect Cell 408-234-7637 > Verplex Systems, Inc. mailto:harry@verplex.com > 840 Shenandoah Dr. www.verplex.com > Plano, TX 75023 www.verifiableRTL.com >
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