Subject: [sv-ac] statement_or_null production question for pass action block
From: Harry Foster (harry@verplex.com)
Date: Sat Mar 29 2003 - 11:39:51 PST
The current proposed syntax for immediate assertions states:
immediate_assert_statement::=
assert ( expression ) action_block
action_block::=
statement_or_null [ else statement_or_null ]
statement_or_null::=
statement
| ‘ ; ‘
However, this seems to suggest that a semicolon would be
required for all pass statements. For example:
always @ (push or pop or cnt or reset_n)
if (reset_n)
if ({push, pop}==1’b01)
underflow_check: assert (cnt!=0) ; else
$error(“underflow error at %m”);
If this is not the intended syntax, then it seems to me
that a new type of 'statement_or_null' production would be
needed since the current definition is used throughout
the remainder standard Verilog BNF.
Best regards,
-Harry
---------------------------------------------------------
Harry Foster Tel 972-423-3186
Chief Architect Cell 408-234-7637
Verplex Systems, Inc. mailto:harry@verplex.com
840 Shenandoah Dr. www.verplex.com
Plano, TX 75023 www.verifiableRTL.com
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