Subject: Re: [sv-ac] Assertion API from SV-CC
From: Adam Krolnik (krolnik@lsil.com)
Date: Mon Mar 03 2003 - 10:03:23 PST
Good morning all;
Reading this and the latest Assertion/Coverage api docs, I would like
to ask a few things.
1. You define 4 types of coverage (statement, fsm, toggle, assertion) - why not
include abilities for expression coverage. It is not generally useful to
talk about statement coverage of assign statements... The definition could
be somewhat left open to allow tools to make their own definition. But having
a definition allows inclusion into a database and user control.
2. FSM recognition.
Why is the 'comment as pragma' style being specified for FSM extraction? Why not
instead make use of attributes? Is the pragma really intented to start with
'tool state_vector' and 'tool enum' ?
3. Why not define some other attributes to limit coverage (or delete) on specific
elements? It would be good if a user had ability to define no coverage for
events that will not occur (specific combination of signals, values, etc.)
You could have (* cover_state_vector = "{a,b,c}" *) ...
4. If a coverage assertion checks for a set of elements, via:
cover $insetz(command, v1, v2, v3, v4, ...);
Would coverage be noted for values chosen? So that one could see which particular
values are not seen?
Thanks.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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