Subject: Re: [sv-ac] Scheduling semantics and cost of assertions.
From: Adam Krolnik (krolnik@lsil.com)
Date: Thu Feb 27 2003 - 10:58:58 PST
Hello Bassam;
I wrote:
> So the preponed (prepended) block must execute for EVERY
> simulation time tick. This block will consist of a value copy
> for EVERY signal listed in an assertion.
You wrote:
>Adam I don't think you necessarily need to physically copy/duplicate for
>assertion purpose....if you do this right.
There is no example provided with the semantics and they are recommending that
individual sections explain how their features work within the scheduling semantics.
I would like to see a better description of how assertions are scheduled and operate
within this new context. It would be good if you can clarify how the scheduling
semantics committee expected them to work.
My understanding and analysis means that assertions will be very expensive due to the
need to sample signals before anything changes - for every simulation time tick.
From the discussion in the SV-AC documents, it would have seemed that a region for
assertion stuff would be created that when their process was scheduled that it would be
placed in a region before the active region. Then upon iteration, the assertion stuff
would be evaluated.
THanks Bassam.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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