Re: [sv-ac] alternative proposal to "syn1": remove binary delay


Subject: Re: [sv-ac] alternative proposal to "syn1": remove binary delay
From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Feb 14 2003 - 11:05:02 PST


stra

Hi John,

In another mail, you wrote:

"I think the perceived difference is coming from ";" being
a non-overlapping operator and "=>" (currently defined) an overlapping operator."

I think this is why the forms I wrote earlier look different.

Going with your and Cindy's recommendation of two implication operators, the forms
from my previous mail:

1. (A; [2] b) ok
2. (A; [1:2] b) ok
3. sequence seqC = ([1:10] c);
    (A; [0] seq) ok.
4. (A => B); ok
5. (A => 1; B) ok but *1.
6. (A => 1; [1:10] B) ok but *1
7. (A => [1:11] B) ok *2

Written with the nonoverlapping operator would match more closely with
the forms that define sequences with a nonoverlapping concatenation operation.

Note: read these as if => is non-overlapping (though currently its not.)

4. (A => [0] B); ok - like #3 where want A && c as matching.
5. (A => B) ok - just like A; B
6. (A => [1:10] B) ok - numbering matches "1 to 10 cycles later."
7. (A => [0:10] B) ok - like #6, but allowing overlap of A & B.

Thus (nonoverlapping versions)
   cover (A; [1:4] B)
   assert (A => [1:4] B)

Would imply the same sequences. And if you had overlapping versions

   cover (A # [1:4] B)
   assert (A &> [1:4] B)

Would also imply the same sequence.

     Adam Krolnik
     Verification Mgr.
     LSI Logic Corp.
     Plano TX. 75074



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