Subject: [sv-ac] and, or, intersect
From: Cindy Eisner (EISNER@il.ibm.com)
Date: Thu Feb 13 2003 - 02:20:44 PST
all,
i am not sure that i understand the rules for what we can propose and what
we cannot, or even if any such rules have been laid down and by who. i
disagree strongly that arguing syntactic matters is going to take up a lot
of time. making a proposal takes a few seconds, discussion can be by email
since the matter is a simple one, and voting is going to be by email also,
as i understand it, so will require typing one additional character.
in addition, i feel strongly that syntactic matters are important. like a
good gui for a tool, good syntax has a huge influence on how a language is
received by the user community.
therefore, i am going continue with my proposal for changing the keywords
"and", "or", and "intersect", for the following reason:
it really bothers me that "or" is the union of regular languages, but "and"
is not intersection. i think that we should either have the correspondence
or-union, and-intersection, or not. so i suggest one of the following:
proposal a:
union be represented by the keyword "union"
intersection be represented by the keyword "intersection"
current keyword "and" stays "and"
proposal b:
union be represented by the keyword "or"
intersection be represented by the keyword "and"
current keyword "and" becomes "pand" (for prefix-and, because it requires
the intersection of a prefix of one with the entire length of the other.
this is reminiscent of using "xor" for "exclusive or")
proposal c:
union be represented by "||"
intersection be represented by "&"
current keyword "and" be represented by "&&"
note that proposal "c" is *not* what we have today in psl, which uses "|",
"&&", and "&" for union, intersection, and current "and", respectively. i
like the argument (sorry, i didn't identify the voice of whoever made it)
that a verilog bit-wise operator is appropriate when the lengths must
match, and a verilog logical operator when they needn't match.
regards,
cindy.
Cindy Eisner
Formal Methods Group Tel: +972-4-8296-266
IBM Haifa Research Laboratory Fax: +972-4-8296-114
Haifa 31905, Israel e-mail:
eisner@il.ibm.com
This archive was generated by hypermail 2b28 : Thu Feb 13 2003 - 02:17:40 PST