VHDL Issue Number:      0165
Classification:         Language Deficiencies and Modeling Problems
Language Version:       VHDL-87
Summary:                Bit string literals cannot be of zero length.
Related Issues:         0013
Relevant LRM Sections:  13.7
Key Words and Phrases:  bit string literals, null arrays
Current Status:         Submitted
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  Section 13.7 was revised.
Superseded By:          N/A
-----------------------
Date Submitted:         1991/03/14
Author of Submission:   Paul Menchini
Author's Affiliation:   CAD Language Systems, Inc.
Author's Post Address:  P.O. Box 13036
                        Research Triangle Park, NC  27709-3036
Author's Phone Number:  (919) 361-1913
Author's Fax Number:    
Author's Net Address:   mench@clsi.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.9 $
Date Last Revised:      $Date: 1995/08/04 01:43:10 $


Description of Problem
----------------------
The BNF defining bit string literals (in Section 13.7) requires that the string
have at least one extended digit.  Thus, null bit strings cannot be expressed
with bit string literals, although (because strings can be of zero length) they
can be expresses with string literals.

This seems an unnecessary restriction.


Proposed Resolution
-------------------
Change the BNF defining bit string literals to allow zero length bit strings.
One possibility is:

        bit_string_literal ::= base_specifier " bit_value "

        bit_value ::= { extended_digit [ underline extended_digit ] }

        base_specifier ::= B | O | X

(The only change is to the production for bit_value; the others are shown for
completeness.)


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
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TBD