VHDL Issue Number:        2103

Language_Version          VHDL-2002
Classification            Language Modeling Enhancement or Deficiency
Summary                   Dynamic/run-time creation and destruction of components and connectivity
Relevant_LRM_Sections     
Related_Issues            
Key_Words_and_Phrases     
Authors_Name              Jim Lewis
Authors_Phone_Number      503-590-4787
Authors_Fax_Number        
Authors_Email_Address     jim@synthworks.com
Authors_Affiliation       SynthWorks VHDL Training
Authors_Address1          
Authors_Address2          
Authors_Address3          

Current Status:           Forwarded

Superseded By:

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Date Submitted:           18 October 2006
Date Analyzed:
Author of Analysis:
Revision Number:          1
Date Last Revised:        16 November 2007

Description of Problem
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Dynamic/run-time creation and destruction of components and connectivity.  
    
    Application target:
    
    Reconfigurable computers: Create an instance of hardware and then
remove it to be replaced later by some other piece of hardware.
    
    Application target: 
    
    Test bench and system design with variable number of objects
interacting on a bus.  Hot plug a board into a system.  Hot removal of
a board from a system.

Proposed Resolution
-------------------

Implement new feature

VASG-ISAC Analysis & Rationale
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This enhancement request may be related to TBV (Test Bench and
Verification) Proposal Number 3: Fork join.

VASG-ISAC Recommendation for IEEE Std 1076-2002
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No change.

VASG-ISAC Recommendation for Future Revisions
---------------------------------------------

Forward as a requirement for future language revisions.