Re: Dec 14th Meeting 58 Minutes Posted

From: JL Gray <jl.gray_at_.....>
Date: Thu Dec 24 2009 - 07:19:39 PST
Srini,

I've been working on coming up with a methodology for using Specman/e with
SystemVerilog on non-Cadence simulators recently. It has not been a trivial
endeavor.  My guess is that the TLM 2.0 connection between e and the VMM 1.2
could be made to work, but would require a reasonably large amount of manual
coding effort.

JL

On Thu, Dec 24, 2009 at 7:07 AM, Srinivasan Venkataramanan <
svenka3@gmail.com> wrote:

> And for any reference validation of this concept we in eWG may want to
> keep OVM  2.0.3 as base and cross verify with VMM 1.2 as the recently
> balloted UVM has chosen OVM as base.
>
> Does this work in CDN's OVM multi-lingual support? How does it work
> with Specman +
>  non-CDN simulator? Someone from CDN care to explain please?
>
> Thanks
> Srini
> www.cvcblr.com/blog
>
>
> On 12/24/09, darren.galpin@infineon.com <darren.galpin@infineon.com>
> wrote:
> > I don't see anything in the documentation that restricts it as you
> suggest.
> > For example:-
> >
> > connect() - Language-Neutral Binding
> >
> > External binding of TLM ports in a lnaguage-neutral way shall be
> supported
> > by the simulation environment. The port method connect() is provided for
> > this purpose. Use connect() when you want to bind two ports which are not
> > both defined in the same language. For example, you can use this method
> to
> > bind a
> > SystemC<
> http://www.eda-twiki.org/cgi-bin/edit.cgi/P1647/SystemC?topicparent=P1647.TlmPorts
> >
> > port to a
> > SystemVerilog<
> http://www.eda-twiki.org/cgi-bin/edit.cgi/P1647/SystemVerilog?topicparent=P1647.TlmPorts
> >
> > port from e. For uniformity, connect() may be used to procedurally bind
> > together e ports as well.
> >
> >
> > Thus the support would already appear to be there.
> >
> > Cheers,
> >
> > Darren
> >
> > ________________________________
> > From: owner-ieee1647@server.eda.org [mailto:
> owner-ieee1647@server.eda.org]
> > On Behalf Of JL Gray
> > Sent: Wednesday, December 23, 2009 5:54 PM
> > To: Brett Lammers
> > Cc: ieee1647@eda.org
> > Subject: Re: Dec 14th Meeting 58 Minutes Posted
> >
> > I have a question about TLM ports. Will it be possible to connect from a
> TLM
> > port in e to one in SystemVerilog? The documentation on the Twiki only
> > discusses connecting to SystemC. The VMM 1.2 now supports TLM 2.0 - it
> would
> > be interesting to see if it was possible to communicate between e and the
> > VMM using a TLM transport interface.
> >
> > Thanks,
> >
> > JL
> >
> > On Wed, Dec 23, 2009 at 10:27 AM, Brett Lammers
> > <brettl@cadence.com<mailto:brettl@cadence.com>> wrote:
> >
> > Hello All,
> >
> > The minutes of meeting 58 of the IEEE 1647 e Language Working Group are
> > posted on the website
> > (http://www.eda-twiki.org/cgi-bin/view.cgi/P1647/Meeting58Minutes). Please
> > review these for accuracy and forward any corrections or additions to me
> > (brettl@cadence.com<mailto:brettl@cadence.com>).
> >
> > Also, please review the attendance record
> > (http://www.eda-twiki.org/twiki/pub/P1647/WebHome/ieee1647_online_roster.xls)
> for
> > this meeting to verify that your attendance was recorded. If not, mail a
> > message to ieee1647@eda.org<mailto:ieee1647@eda.org> containing rollcall
> in
> > the subject line.
> >
> > The next meeting is scheduled for Feb 8th at 9:00am PST (1700 UTC). NOTE:
> We
> > are skipping the January meeting but would like to have the remaining
> drafts
> > ready for the February meeting
> >
> > Thank you and Happy Holidays!!
> >
> > Brett Lammers
> >
> >
> >
> > --
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