Verilog-AMS Sample Library

The intent of this page is to provide a set of diverse examples to show the power and applicability of Verilog-AMS to different domains and applications. These examples can be used to better understand the Verilog-AMS constructs.

Although we do try to keep the examples as up to date as possible, they may contain descrepencies with the current Verilog-AMS language standard. If errors are found, please let us know via email to David Miller (remember to remove the NOSPAM from the addresss)

Models are organized under the following categories:

-- DavidMiller - 2011-02-24

Topic revision: r2 - 2013-02-25 - 17:26:04 - DavidMiller
 
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