Mission: VASG is responsible for maintaining and extending the VHDL standard (IEEE 1076).
Status: The WG is preparing a PAR and starting to identify issues to work on for the 202X revision of the standard.
Participating
If you are an experienced VHDL user, digital designer, or verification engineer, then this is your working group.
P1076 is an individual based standard. The only requirement for membership is to show up and participate.
There are no fees required.
Work is done in on-line meetings, email, gitter, GitLab (newer stuff), and TWIKI (older stuff).
All of this permits you to contribute what you can when you can.
We seek volunteers experienced in one or more:
VHDL design or verification
Language design (VHDL, ADA)
Programming Language Interfaces
Digital design experience (DSP, Floating-Point, …)