Synthesizable 'event Attribute

Proposal Details

• Who Updates: DanielKho, JimLewis, <Add YourName >
• Date Proposed: 2015-01-02
• Date Last Updated:
• Priority:
• Complexity:
• Focus:

Current Situation

Currently, there is no convenient way of describing dual-edge-triggered flip-flops. Existing implementations rely on working around synthesis tools, or instantiating a vendor-specific DDR IP.

Requirement

Synthesisable 'event attribute for dual-edge triggers. Synthesis tools can infer DDR blocks or have a dual-edge trigger configuration using multiple flip-flops.

Related and/or Competing Issues

Clocked Shorthand - syntax example using [if rising_edge(clk) or falling_edge(clk) then...] may be replaced with [if clk'event then...].

Implementation details

Code Examples

Example of 'event attribute used in a dual-edge-triggered flip-flop.

process(clk) is
begin
    if clk'event then
        /* Output q is triggered at both edges of the clk. */
        q<=d;
    end if;
end process;

Use Cases

Arguments FOR

Arguments AGAINST

General Comments

Supporters

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-- DanielKho - 2015-01-02

-- PatrickLehmann - 2016-02-19