TWiki
>
P1076 Web
>
Vhdl2019MeetingMinutes
>
2014_MeetingAugust28
(2020-02-17,
JimLewis
)
E
dit
A
ttach
P1076 August 28, 2014 Meeting Minutes
Attendees:
JimLewis
*
CliffordWalinsky
*
PeterFlake
*
MartinThompson
*
Agenda:
Action Item Review
Ranking Criteria
Review and Approve Meeting Minutes:
Next Meeting: Thursday September 11, 2014 8 am Pacific
Previous Meeting: Thursday August 21, 2014
Action Item Review
Discussion
Garbage collection for dynamic memory
Peter: Deallocate can be useful to the garbage collector
Can't remove deallocate from the language - Peter & Jim
What happens when deallocate called, but there are still reference pointers out there to the object
Cliff to look at garbage collection
Subtypes and Functions
If we know the object to which is being assigned, can we make useful and safe rules?
Current rules are safe, but in the case of "+" and "-" one has to choose between modulo math and full precision math
Also interesting uses of resize in the proposal
Problematic: Y <= (A * 5) * B ; -- probably will remain problematic
Peter to take a look.
Martin - 2033 -
ModularTypes
Increment operator with modulo wrap around.
Added proposal to collected requirements list
Integers and Logic Operations
IntegerOperators
Obligates a bit implementation for integers
Martin to write email to reflector
Topics for Future Meetings
Integers: Arbitrary vs. Fixed Size?
Need more reviewers of matrix math package
Ryan: Arbitrary width real: see
Nov 8 2012 meeting
Open - Multi dimensional Array restructuring: Array <--> Matrix Transformations
2012_MeetingJuly19
MeetingDecember15
Matlab has built-in reshape functions
In VHDL - explicit vs implicit defined operator
David Bishop: Requiring an implicit operator could delay implementations
Can this be handled by anonymous types on interfaces or generics on a package?
Language facility for creating implicit operators?
Ryan - Slicing Multidimensional Arrays (FT15) maybe related to above
2012_MeetingMay24
Jim - Mark bugzillas for which we have a proposal with that status
Jim - Table driven modeling via protected types
2012_MeetingMay10
Open - technical leader for 1076.6 activities?
std_logic_1164 uses 1076.6 attribute "RTL_SYNTHESIS_OFF" and "RTL_SYNTHESIS_ON"
Ranking Criteria
Rank based on need
Item needs to be fixed
Useful for an application
Rank based on complexity
How hard to implement
Noted several items in Collected Requirements as Must Do
AI: Jim: Create ranking sheet.
Review and Approve Meeting Minutes:
Motion: Cliff 2nd: Peter
Next Meeting: Thursday
September 11, 2014
8 am Pacific
Previous Meeting: Thursday
August 21, 2014
E
dit
|
A
ttach
|
P
rint version
|
H
istory
: r3
<
r2
<
r1
|
B
acklinks
|
R
aw View
|
Ra
w
edit
|
M
ore topic actions
Topic revision: r3 - 2020-02-17 - 15:36:13 -
JimLewis
P1076
Log In
or
Register
P1076 Web
Create New Topic
Index
Search
Changes
Notifications
RSS Feed
Statistics
Preferences
Webs
Main
P1076
Ballots
LCS2016_080
P10761
P1647
P16661
P1685
P1734
P1735
P1778
P1800
P1801
Sandbox
TWiki
VIP
VerilogAMS
Copyright © 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki?
Send feedback